1. Field of the Invention
The field of the invention relates generally to semiconductor processing. More particularly, the field of the invention relates to systems and methods for pulsed plasma processing of a semiconductor substrate.
2. Description of the Related Art
Plasmas have been used in a variety of processes for the manufacture of integrated circuit devices including etching, stripping of photoresist and plasma enhanced chemical vapor deposition. The plasma is created by providing energy to a gas in a reactor chamber. The plasma consists of two qualitatively different regions: a quasi-neutral, equipotential conductive plasma body and a boundary layer called the plasma sheath. The plasma body comprises a plurality of mobile charge carriers and thus is a conductive medium. Its interior generally has a uniform electric potential. A plasma cannot exist for long in direct contact with material objects and rapidly separates itself from objects by forming a non-neutral sheath. The sheath is an electron deficient, poorly conductive region having a strong electric field. This electric field typically extends perpendicularly between the plasma body and any interface with material objects, such as reactor walls and wafers placed within the reactor.
Plasma reactors typically provide energy to the gas in the reactor chamber by coupling RF electric power into the chamber. The RF power coupled into the reactor chamber ionizes, dissociates, and excites molecules within the plasma body. In particular, the RF power provides energy to free electrons in the plasma body. Ionization occurs when an energized free electron collides with a gas molecule causing the gas molecule to ionize. Dissociation occurs when an energized free electron collides with a gas molecule, such as O2, causing the molecule to break into smaller molecular or atomic fragments, such as atomic oxygen, for example. Excitation occurs when the collision does not break molecular bonds but rather transfers energy to the molecule causing it to enter an excited state. Control of the relative amounts of ionization, dissociation, and excitation depends upon a variety of factors, including the pressure and power density of the plasma. The plasma body typically consists of radicals, stable neutral particles and substantially equal densities of negatively and positively charged particles.
Plasmas may be particularly useful for anisotropic etching of a semiconductor substrate. Anisotropic etching is etching that occurs primarily in one direction, whereas isotropic etching is etching that occurs in multiple directions. Anisotropic etching is desirable for manufacturing integrated circuit devices, because it can be used to produce integrated circuit features having precisely located sidewalls that extend substantially perpendicularly from the edges of a masking layer. This precision is important in devices that have a feature size and spacing comparable to the depth of the etch.
To accomplish an anisotropic plasma etch, a semiconductor substrate such as a wafer may be placed in a plasma reactor such that the plasma sheath forms an electric field perpendicular to the substrate surface. This electric field accelerates ions perpendicularly toward the substrate surface for etching. One conventional approach to anisotropic plasma etching uses parallel planar electrodes. Often, the lower electrode acts as a pedestal for a wafer. RF power is applied to the electrodes to produce a plasma and accelerate ions toward the wafer surface.
The crystalline silicon or thin insulating layers of some modern integrated circuit designs may be damaged by high energy ion bombardment, so it may be necessary to decrease the RF power applied to the electrodes for lower ion energy etch processes. Decreasing the RF power, however, will reduce the ion density in the plasma. Decreased ion density usually decreases the etch rate.
Inductively coupled reactors have been used to overcome this problem by using separate RF coupling mechanisms (and therefore separate power sources) to control the ion density and ion bombardment energy. Power is applied to an induction coil surrounding the reactor chamber to inductively couple power into the chamber to produce the plasma. The inductively coupled power accelerates electrons circumferentially within the plasma and generally does not accelerate charged particles toward the wafer which is placed below the plasma. The level of power applied to the induction coil may be adjusted to control the ion density in the plasma. Some power from the induction coil may be capacitively coupled into the plasma, however, and may accelerate ions toward the walls and the wafer. To reduce this capacitive coupling a split Faraday shield may be placed around the reactor. See U.S. patent application Ser. No. 07/460,707 filed Jan. 4, 1990, which is assigned of record to the assignee of the present application and which is hereby incorporated by reference. A separate source of power may be applied to a wafer support to accelerate ions toward the wafer for etching. A relatively high level of power may be applied to the induction coil to provide a plasma with a high ion density, and a relatively low level of power may be applied to the wafer support to control the energy of ions bombarding the wafer surface. As a result, a relatively high rate of etching may be achieved with relatively low energy ion bombardment.
While low energy ion bombardment may reduce damage to sensitive layers of the integrated circuit, other problems may be encountered which interfere with the anisotropic nature of the etch. In particular, low energy ions may be deflected by charges that accumulate on the wafer or mask surface during etching.
This charge buildup may result from the relatively isotropic motion of electrons in the plasma as opposed to the anisotropic motion of the ions. The normal thermal energy of the plasma causes the electrons to have high velocities because of their low mass. These high velocity electrons collide with molecules and ions and may be deflected in a variety of directions, including toward the wafer surface. While the negative bias on the wafer tends to repel electrons, the high velocity of some electrons overcomes this negative bias. The electrons are deflected in a variety of directions and have a relatively isotropic motion. As a result, electrons deflected toward the wafer surface tend to accumulate on elevated surfaces of the wafer or mask layer, rather than penetrating to the depths of narrow wafer features (which would require a perpendicular, anisotropic motion).
Ions, on the other hand, have a large mass relative to electrons and do not have high random velocities. Rather, the bias on the wafer support accelerates ions perpendicularly toward the wafer surface. This anisotropic acceleration allows ions to penetrate to the depths of narrow wafer features more readily than electrons.
As a result, negatively charged electrons tend to accumulate on the upper surfaces of the wafer or mask layer, while positively charged ions tend to accumulate in the recessed regions of the wafer that are being etched. These accumulated charges may form small electric fields, referred to as xe2x80x9cmicro fields,xe2x80x9d near integrated circuit features on the wafer surface. While these small electric fields may have little effect on high energy ions, they may deflect low energy ions used in low energy etch processes for small integrated circuit features. The negative charge on the substrate or mask surface tends to attract positively charged ions, while the positive charge in recessed regions tends to repel these ions. As a result, low energy ions falling into recessed regions between features may be deflected into feature sidewalls, thereby undercutting the mask layer. This undercutting can degrade the anisotropic etch process and inhibit the formation of well-defined features with vertical sidewalls.
Therefore, what is needed is an improved anisotropic etch process. Preferably such a process will allow low energy ions to be used for etching small integrated circuit features while substantially eliminating the problems associated with charge buildup on the wafer surface. Preferably such a process will enable the manufacture of small integrated circuit features with well-defined vertical sidewalls.
Aspects of the present invention provide an improved etch process. One aspect of the present invention provides a power source that alternates between high and low power cycles to produce and sustain a plasma discharge. Preferably, the high power cycles couple sufficient power into the plasma to produce a high density of ions (1011 cmxe2x88x923) for etching. Preferably, the low power cycles allow electrons to cool off to reduce the average random (thermal) electron velocity in the plasma. Preferably, the low power cycle is limited in duration as necessary to prevent excessive plasma loss to the walls or due to recombination of negative and positive ions. During the low power cycles the power may be off.
It is an advantage of these and other aspects of the present invention that average electron thermal velocity is reduced, so fewer electrons overcome the plasma sheath and accumulate on substrate or mask layer surfaces. As the plasma electrons cool, the sheath potential decreases which allows the plasma to move closer to the substrate surface and positive ions flow to the wafer surface which neutralizes charges that have accumulated on elevated surfaces as well as within the depths of recessed features.
Another aspect of the present invention provides a separate power source that alternates between high and low power cycles to accelerate ions toward the substrate being etched. In one embodiment, a strong bias is applied to the substrate in short bursts. Preferably, multiple burst occur during the average transit time for an ion to cross the plasma sheath and reach the substrate surface. During the low power cycles, the power may be off.
When intermittent bursts are used for the bias, ions are accelerated toward the substrate in pulsed waves. Ions striking the surface cause anisotropic etching of the substrate. Most ions are pulsed near the substrate surface without reaching it. During the low power cycles, these ions coast toward the surface and those that do not collide with neutral particles continue to move substantially perpendicularly to the biased surface. During the next burst, the remaining ions in the sheath are again accelerated toward the substrate for anisotropic etching. These ions are not deflected into sidewalls as readily as ions in conventional low energy etch processes due to reduced charge buildup and the relatively low duty cycle of power used to pulse ions toward the substrate surface.
In an alternate embodiment, a lower frequency A.C. bias (100 kHz to 1 MHz) is applied to the substrate. The bias may be a continuous A.C. wave or it may alternate between high power cycles (for multiple wavelengths) and low (or zero) power cycles. Preferably, the half cycles of the A.C. waveform are at least equal to the ion transit time for ions in the sheath region. When a low frequency A.C. bias is used, negative and positive ions are alternatively accelerated toward the substrate for etching. Since the etch alternates between negative and positive ions, charge buildup on the substrate surface is avoided.
Another embodiment of the present invention synchronizes the power source used to supply power to the plasma with the power source used to bias the substrate. For example, the power sources may be synchronized such that the power source used to bias the substrate transitions to a high power cycle after the power source that couples power to the plasma has transitioned to a low power cycle. Preferably, the delay between the transition of the plasma power source to a low power cycle and the transition of the bias power source to a high power cycle should be sufficient to allow electrons within the plasma to cool to, for example, about 1 eV. This delay allows the electrical charge on raised features of the substrate (caused by accumulation of high energy electrons) to dissipate before ions are accelerated toward the substrate for processing, and therefore, alleviates many of the problems, such as ion steering and undercutting, associated with having a potential difference between upper and lower substrate features.
The power sources may be further synchronized such that the bias power source transitions to a low power cycle after the plasma power source transitions to a high power cycle. In other words, the power sources may be configured such that there is a relatively short period of time, such as 1 to 2 microseconds, during which both power sources are in a high power state. Because the impedance of the plasma changes during the period the plasma power source is in a low power cycle, the plasma power source may be unable to couple sufficient power to the plasma due an impedance mismatch. Having both power sources in a high power state for a relatively short period may promote the coupling of power to the plasma until the impedance of the plasma matches the impedance matching network associated with the plasma power source.
Preferably, the above aspects of the present invention are combined into a single low ion energy, anisotropic etch process with reduced charge buildup and improved feature definition.